As digital techniques find application in more and more branches of electronic engineering, the time cannot be far when audio equipment is also interconnected by digital interfaces. One such interface has been in use for a number of years already: at the output of CD players. This article describes the Philips -Sony design of such an interface.
In broadcasting and recording studios, the era of digital recording began in the late 1970s. Right from the start, it was realized that in order to transfeE digital audio data between the many pieces of equipment, it would be imperative to specify standards for the required inter- faces. With the support and partici- pation of the European Broadcasting Union-EBU-and the Audio Engineering Society-AES-a serial interface with high transfer speed was developed, which, under the name AES-EBU Interface has found extensive application in audio studios.
With the advent of the CD player, a similar standard interface was required and subsequently developed as a 'con- sumer version' of the AES-EBU standard. This version has become known as the 'Philips-Sony-Format', and has been proposed as the basis of an IEC Specification. From day one, this standard has been incorporated in all CD players with digital output.
The most notable external difference between the AES-EBU Interface and the Philips-Sony-Format is the use of a normal audio socket in the latter instead of the symmetrical outputs that are, of course, obligatory in a professional studio. Other differences are that the studio interface has- an output im- pedance of 110 ohms, and an output level of 3-10 Vpp. Otherwise, the signals and transfer arrangement are similar.
The signal at the digital output of a CD player contains no d.c. component, is nearly sinusoidal, and has an amplitude of about 500 mVp and a frequency of almost 3 kHz. This frequency depends on the sample frequency. Two 32 -bit words (one for each stereo channel) are transferred per sample, which, at the CD's sampling rate of 44.1 kHz, gives a transfer rate of 2.8224 Mbit/s. The transfer rate for DAT (samplingrate=48 kHz) is 3.072 Mbit/s, and that for digital broadcast receivers (sampling rate=32 kHz) is 2.048 Mbit/s. The Philips-Sony-Format may be used at all three sampling rates.
All impedances (input, output, and line) have been standardized at 75 ohms, so that coaxial cable may be used for long signal paths. This is particularly useful, since the minimum level for the digital input has been specified at 200 mV. When cables more than 10 metres long are used, it is imperative that all impedances are kept within specification to prevent problems arising during the critical decoding processes.
With optical data transfer via fibre optic cables, the impedances do not present such a problem, because the electrical connection between output and optical transmitter can be kept short. Fibre optic cable, on the other hand, offers greater attenuation. Furthermore, at transfer frequencies above about 1 MHz, it introduces phase shifts because of differences in path lengths. These problems make careful signal preparation at the receiver side imperative.
For the transfer of digital data, the socalled Biphase Mark Code is used. This means that for a logic 1 there are two polarity changes (zero crossings) of the signal, and for a logic 0 one polarity change, as shown in Fig. 1. The clock (upper trace) is double the bit rate. Each data bit to be transferred is represented by two sequential logic states, i.e., two bits, which together are treated as one cell. A cell corresponds to the timeslot for one data bit.
The logic state at the onset of a data bit is always the opposite of the state at the end of the preceding data bit. The logic state at the end of a data bit is the same as that at the onset if the bit corresponds to logic 0, but is the opposite when the bit to be transferred is logic 1. This explains how, in Fig. 1, the cell sequence is produced from the data signal, and which subsequently results in the biphase mark signal. This results in:
- change of signal polarity after each bit;
- two changes of signal polarity for each logic 1.
The first four bits of a 32 -bit word (bits 0 to 3) form the so-called preamble for the synchronization (see Fig. 2). This sync sample, which really only corresponds to the length of four data bits, does not represent a biphase code and contains no data. Yet, there are three types of sync sample in order to simultaneously identify words and blocks. The preamble is distinguished from data bits in that no two polarity changes occur at the edges of the bits. The logic state of the first section of the preamble is the opposite of that of the second part of the preceding bit, which is the parity bit (bit 31) of the preceding 32 -bit word. The subsequent cell sequences of the preamble, consisting of eight successive logic states (four cells), are shown in Table 2.
The three preamble samples have the following meaning:
- 'B' marks a data word from channel 'A' (left-hand) stereo channel) that starts a block;
- 'M' marks a data word from channel `A' that does not begin a block;
- 'W' marks a data word from channel 'B' (right-hand stereo channel); it may also be used for other channels (bit not 'A') in multi -channel systems.
Fig. 2 shows a preamble 'B' that starts at a leading edge.
For each channel sample, a 32 -bit word called subframe is transferred-see Fig. 3. The first section contains the preamble (bits 0 to 3), followed by four bits auxiliary audio data (bits 4 to 7), and a 20 -bit audio sample word (bits 8 to 27). This enables a resolution of the transfer standard of up to 24 bits per sample. The CD player needs only the 16 bits from LSB (bit 13) to MSB (bit 28); the unused bits (4 to 12) are made logic low.
The last section of the subframe contains the validity bit, which shows the receiver that the audio sample will not be used. This bit is set by the CD player in case of an error. Bit 29 contains sub - code data from the CD player, such as text information. Bit 30 contains the channel status data. Finally, the parity bit ensures parity of all word bits, except sync sample bits 0 to 3.
The number of subframes in a frame corresponds to the number of channels. In a CD player, a frame contains a sub - frame for left-hand channel 'A' and one for right-hand channel `B'. A block, commencing with preamble 'B', contains 192 frames-see Fig. 4. The transfer time of a frame corresponds to the period of the sampling rate of the signal source (in CD= 44.1 kHz).
One bit per subframe is used for the conveyance of channel status and subcode information. Since the channel status bits in the two sub frames of a frame are identical, only 192 of such bits are used from each block. The first four of these are control bits. Bit 1 is logic high only in 4 -channel operation. Bit 2 is 0 (reserved). Bit 3 is the copy -inhibit bit: when it is logic 1, copying can take place; when it is 0, copying is impossible. Bit 4 is the pre -emphasis bit (logic 1 for pre - emphasis).
Bits 5 to 8 are logic 0 (reserved). Bits 9 to 16 represent a category code, which can indicate three categories: (a). general 2 -channel format (bits 9 to 16 = 0); (b) 2 -channel CD format (bit 9 = 1); and (c) 2 -channel PCM encoder-decoder format (bit 10 = 1). Bit 9 is set by the CD player. The remaining status bits (17 to 192) are always 0.
The subcode bits may, if desired, be used by the CD manufacturer, but to date there are no consumer requirements for this. All that has been laid down so far is that the subcode bits be combined into blocks of 1176 bits for the introduction of a sync word that consists of at least 16 logic low bits.
Fig. 5 shows the simplified circuit diagram of a CD player with the extensively used batch of Valvo ICs. Of particular interest here is the digital over -sampling filter (Philips SAA7270) that operates in conjunction with the data decoder (Philips SAA7210) at the input and the dual digital -to -analogue converter (Philips TDA1541) at the output. This popular 16 -bit 4 - times oversampling system has the advantage that a simple Bessel filter of the 3rd order is sufficient as a low-pass section at the analogue output which is here formed by the Philips TDA1542.
Less well-known is the advantage of Valvo's design in integrating the interface for the digital output in the digital filter, as shown in Fig. 6a. The DOBM (Digital Out Biphase Mark) signal is present at pin 14. Since pin 14 is the output of a 5-V NMOS IC with corresponding logic state (0.2 V or 4.8 V), it is necessary, in order to obtain the standard 500 mV output into 75 ohms, to connect it to the load via a 100 nF capacitor and a potential divider, as shown in Fig. 6b. As shown in Fig. 5, Philips uses a small transformer to couple pin 14 to the 75 -ohms load.
The extra cost of a digital output in CD players that use the Valvo ICs is very small. Yet, CD players with this facility are rare. As has been shown, it is very simple, however, to add it at a later stage. In equipment with Japanese ICs, it is, unfortunately, not quite so simple or inexpensive. However, Sony has brought a Digital Audio Data Modulating and transmitting IC, the Type CX23033, on the market, which is suitable for use not only in CD players, but also in DATs and PCM tuners.
For digital audio taperecordersDATs-Sony has developed new LSIs, of which one, the 64 -pin SMD IC Type CXD1146Q, assumes the sending and receiving in Philips -Sony Format. On the other hand, the CX23033, whose block schematic is shown in Fig. 7, offers four different modes of operation. For example, in the DAT mode, it is possible to set the copy -inhibit bit (bit 3 as discussed earlier) via pin 22 (D6). The data to be transferred are applied serially to pin 2 and from there transmitted in Philips-Sony Format to pin 15.
Fig. 8 shows an example of connecting the CX23033 with a so-called one -chip CD that uses the Sony CX23033 with 48 clock pulses per sample.
The matching IC at the receiver side of the digital audio connection is the CX23053, whose block schematic is shown in Fig. 9. This chip demodulates and evaluates the biphase signal, after this has been synchronized with the aid of an external PLL. It then delivers the serial audio data to the Data output (pin 2), and the subcode and control data to other relevant outputs. The copy inhibit bit is available at pin 26 for further use. A comparable receiver building brick can be constructed from Philips/Valvo's SAA7220 and Philips TDA1541. Although this has been developed, it has at the time of writing (April 1988) not yet reached the market.